1. Field of the Invention
This invention relates to voltage supply means, and more particularly, to a voltage-switching regulator with built-in voltage-switching module for supplying a terminal voltage to a memory unit operating under DDR (DRAM of Double Rate) mode.
2. Description of Related Art
Computer memory devices, such as SDRAM (Synchronous Dynamic Random-Access Memory), are basically driven by a clock signal in such a manner that each access action is activated either by the rising edges or the falling edges in the clock signal. Under the so-called DDR (DRAM of Double Rate) mode, the access operations can be activated both at the rising edges and the falling edges in the clock signal, thereby doubling the access speed to the memory.
Under the DDR mode of operation, however, it is required to supply a drive current (I.sub.d) or a sink current (Is) to the data bus of the memory so that the terminal voltage (V.sub.TT) on the data bus to can be pulled up or down. This requirement is conventionally provided by using a separate voltage-switching regulator IC which is externally connected to the data bus of the memory.
FIG. 1A shows a conventional configuration for the use of an externally-connected voltage-switching regulator IC (here designated by the reference numeral 14). In the case of FIG. 1A, for example, the voltage-switching regulator IC 14 is externally connected via an SSTL (Series Stub Terminated Logic) line to a memory unit 12 composed of four memory modules 12a, 12b, 12c, 12d for the purpose of supplying a terminal voltage V.sub.TT to the memory unit 12 during access operations. A memory controller 10 is used to control the access operations to the memory unit 12. The SSTL line includes a pair of first resistors R.sub.T and a second resistor R.sub.S, where R.sub.T =56 .OMEGA. (ohm) and R.sub.S =33 .OMEGA., for example. The terminal voltage V.sub.TT outputted from the voltage-switching regulator IC 14 varies with the input reference voltage V.sub.REF.
FIG. 1B shows the same of FIG. 1B except for the use of a GTL+ (Gunning Transceiver Logic) line instead of an SSTL line to supply the terminal voltage V.sub.TT to the memory unit 12. The GTL+ line differs from the SSTL line only in that it includes only the two resistors R.sub.T (the resistor R.sub.S used in the SSTL line is here removed).
One drawback to the use of the foregoing voltage-switching regulator IC 14, however, is that, since it is a separate IC device externally connected to the memory controller 10 and the memory unit 12, it requires an additional layout area on the motherboard for mounting, making the manufacture of the motherboard more complex in process and thus cost-ineffective to implement.